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Shadowrun: Awakened 29 September 2011 - Build 871
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00001 /* 00002 Copyright 2005-2010 Intel Corporation. All Rights Reserved. 00003 00004 This file is part of Threading Building Blocks. 00005 00006 Threading Building Blocks is free software; you can redistribute it 00007 and/or modify it under the terms of the GNU General Public License 00008 version 2 as published by the Free Software Foundation. 00009 00010 Threading Building Blocks is distributed in the hope that it will be 00011 useful, but WITHOUT ANY WARRANTY; without even the implied warranty 00012 of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 00013 GNU General Public License for more details. 00014 00015 You should have received a copy of the GNU General Public License 00016 along with Threading Building Blocks; if not, write to the Free Software 00017 Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA 00018 00019 As a special exception, you may use this file as part of a free software 00020 library without restriction. Specifically, if other files instantiate 00021 templates or use macros or inline functions from this file, or you compile 00022 this file and link it with other files to produce an executable, this 00023 file does not by itself cause the resulting executable to be covered by 00024 the GNU General Public License. This exception does not however 00025 invalidate any other reasons why the executable file might be covered by 00026 the GNU General Public License. 00027 */ 00028 00029 #ifndef __TBB_machine_H 00030 #error Do not include this file directly; include tbb_machine.h instead 00031 #endif 00032 00033 #include <intrin.h> 00034 #if !defined(__INTEL_COMPILER) 00035 #pragma intrinsic(_InterlockedOr64) 00036 #pragma intrinsic(_InterlockedAnd64) 00037 #pragma intrinsic(_InterlockedCompareExchange) 00038 #pragma intrinsic(_InterlockedCompareExchange64) 00039 #pragma intrinsic(_InterlockedExchangeAdd) 00040 #pragma intrinsic(_InterlockedExchangeAdd64) 00041 #pragma intrinsic(_InterlockedExchange) 00042 #pragma intrinsic(_InterlockedExchange64) 00043 #endif /* !defined(__INTEL_COMPILER) */ 00044 00045 #if defined(__INTEL_COMPILER) 00046 #define __TBB_release_consistency_helper() __asm { __asm nop } 00047 inline void __TBB_rel_acq_fence() { __asm { __asm mfence } } 00048 #elif _MSC_VER >= 1300 00049 extern "C" void _ReadWriteBarrier(); 00050 #pragma intrinsic(_ReadWriteBarrier) 00051 #define __TBB_release_consistency_helper() _ReadWriteBarrier() 00052 #pragma intrinsic(_mm_mfence) 00053 inline void __TBB_rel_acq_fence() { _mm_mfence(); } 00054 #endif 00055 00056 #define __TBB_WORDSIZE 8 00057 #define __TBB_BIG_ENDIAN 0 00058 00059 // ATTENTION: if you ever change argument types in machine-specific primitives, 00060 // please take care of atomic_word<> specializations in tbb/atomic.h 00061 extern "C" { 00062 __int8 __TBB_EXPORTED_FUNC __TBB_machine_cmpswp1 (volatile void *ptr, __int8 value, __int8 comparand ); 00063 __int8 __TBB_EXPORTED_FUNC __TBB_machine_fetchadd1 (volatile void *ptr, __int8 addend ); 00064 __int8 __TBB_EXPORTED_FUNC __TBB_machine_fetchstore1 (volatile void *ptr, __int8 value ); 00065 __int16 __TBB_EXPORTED_FUNC __TBB_machine_cmpswp2 (volatile void *ptr, __int16 value, __int16 comparand ); 00066 __int16 __TBB_EXPORTED_FUNC __TBB_machine_fetchadd2 (volatile void *ptr, __int16 addend ); 00067 __int16 __TBB_EXPORTED_FUNC __TBB_machine_fetchstore2 (volatile void *ptr, __int16 value ); 00068 void __TBB_EXPORTED_FUNC __TBB_machine_pause (__int32 delay ); 00069 } 00070 00071 00072 #if !__INTEL_COMPILER 00073 extern "C" unsigned char _BitScanReverse64( unsigned long* i, unsigned __int64 w ); 00074 #pragma intrinsic(_BitScanReverse64) 00075 #endif 00076 00077 inline __int64 __TBB_machine_lg( unsigned __int64 i ) { 00078 #if __INTEL_COMPILER 00079 unsigned __int64 j; 00080 __asm 00081 { 00082 bsr rax, i 00083 mov j, rax 00084 } 00085 #else 00086 unsigned long j; 00087 _BitScanReverse64( &j, i ); 00088 #endif 00089 return j; 00090 } 00091 00092 inline void __TBB_machine_OR( volatile void *operand, intptr_t addend ) { 00093 _InterlockedOr64((__int64*)operand, addend); 00094 } 00095 00096 inline void __TBB_machine_AND( volatile void *operand, intptr_t addend ) { 00097 _InterlockedAnd64((__int64*)operand, addend); 00098 } 00099 00100 #define __TBB_CompareAndSwap1(P,V,C) __TBB_machine_cmpswp1(P,V,C) 00101 #define __TBB_CompareAndSwap2(P,V,C) __TBB_machine_cmpswp2(P,V,C) 00102 #define __TBB_CompareAndSwap4(P,V,C) _InterlockedCompareExchange( (long*) P , V , C ) 00103 #define __TBB_CompareAndSwap8(P,V,C) _InterlockedCompareExchange64( (__int64*) P , V , C ) 00104 #define __TBB_CompareAndSwapW(P,V,C) _InterlockedCompareExchange64( (__int64*) P , V , C ) 00105 00106 #define __TBB_FetchAndAdd1(P,V) __TBB_machine_fetchadd1(P,V) 00107 #define __TBB_FetchAndAdd2(P,V) __TBB_machine_fetchadd2(P,V) 00108 #define __TBB_FetchAndAdd4(P,V) _InterlockedExchangeAdd((long*) P , V ) 00109 #define __TBB_FetchAndAdd8(P,V) _InterlockedExchangeAdd64((__int64*) P , V ) 00110 #define __TBB_FetchAndAddW(P,V) _InterlockedExchangeAdd64((__int64*) P , V ) 00111 00112 #define __TBB_FetchAndStore1(P,V) __TBB_machine_fetchstore1(P,V) 00113 #define __TBB_FetchAndStore2(P,V) __TBB_machine_fetchstore2(P,V) 00114 #define __TBB_FetchAndStore4(P,V) _InterlockedExchange((long*) P , V ) 00115 #define __TBB_FetchAndStore8(P,V) _InterlockedExchange64((__int64*) P , V ) 00116 #define __TBB_FetchAndStoreW(P,V) _InterlockedExchange64((__int64*) P , V ) 00117 00118 // Not used if wordsize == 8 00119 #undef __TBB_Store8 00120 #undef __TBB_Load8 00121 00122 #define __TBB_AtomicOR(P,V) __TBB_machine_OR(P,V) 00123 #define __TBB_AtomicAND(P,V) __TBB_machine_AND(P,V) 00124 00125 extern "C" __declspec(dllimport) int __stdcall SwitchToThread( void ); 00126 #define __TBB_Yield() SwitchToThread() 00127 #define __TBB_Pause(V) __TBB_machine_pause(V) 00128 #define __TBB_Log2(V) __TBB_machine_lg(V) 00129 00130 // Use generic definitions from tbb_machine.h 00131 #undef __TBB_TryLockByte 00132 #undef __TBB_LockByte
Copyright © 2007-2010 by The Shadowrun: Awakened Team. This work is licensed under the GNU Lesser General Public License 3.